A 0.5GHz-1.5GHz Order Scalable Harmonic Rejection Mixer

A harmonic rejection mixer architecture capable of operating for a wide range of LO frequencies is demonstrated. The mixer can be configured to suppress any particular harmonic of the LO or multiple harmonics simultaneously. The level of suppression of each harmonic is controlled by a set of independent gain and phase tuning parameters. Feasibility of extension of this concept to higher order harmonics is also demonstrated.

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This research has been published in RFIC 2013.

A Frequency Synthesizer for Low Jitter applications

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Tri-state digital phase-frequency detectors (PFDs) are widely used for the large capture and locking range that they enable, but suffer from relatively large in-band phase noise. Sub-sampling phase detectors have recently been demonstrated to offer very low in-band noise but with only a very small capture range. We show how a PFD and a sub-sampling phase detector can be combined to maintain the phase-frequency detection capabilities while simultaneously obtaining in-band noise suppression. A 2.2GHz PLL is demonstrated in a 65nm CMOS process with an on-chip loop filter area of 0.04mm^2. The measured in-band phase noise improves from -110dBc/Hz to -122dBc/Hz when the auxiliary sub-sampling phase detector is active.

A Digitally Controlled Phase Shifter for Multiple-Antenna Transceivers

Beam steering using multiple-antenna transceivers is an emerging area of research for commercial wireless communication applications. Realizing narrow beams offers spatial filtering and can relax the receiver’s linearity requirements, however, it requires accurate gain and phase matching in the various antenna transceivers. For RF systems operating from 800MHz to 5GHz, wavelengths in free space vary from 37.5 to 6cms and the transceivers thus reside on different chips. The task of phase matching the different antenna signal paths is then more challenging than at mm-wave frequencies In my research, I am trying to address the problem of accurate phase synchronization and shifting in standard CMOS.

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As the first step in this direction, I have built a phase shifter in 90nm CMOS technology. The prototype was tested and the results are submitted to Radio and Wireless Symposium, 2011.

A mmWave Direct Conversion Receiver

In this work, a mmWave direct conversion receiver for a 60GHz application was designed in 90nm CMOS Technology . The project involved the integration of RF Frontend: LNA, mixer and an oscillator in 90nm CMOS Technology. The Frontend provided 30dB Power Gain with a bandwidth of 2.4GHz centered around 60GHz.