CSEE W4840 - Embedded System Design - Project

Implementing high-speed 128-bit AES decryption on an FPGA

What's this?

On this page, you'll find information regarding Bhargav's embedded system design project that he completed as part of a four-man team in the Spring of 2008.

Project Description

The original specification of this self-suggested project involved decrypting a single image on an Secure Digital (SD) card. Since these goals were met early, Prof. Stephen Edwards, who was the course instructor, suggested that the team implement decryption on a series of images stored in sequence on an SD-card instead. Bhargav's goal in this project was to handle pixel decoding, high-level processor integration, and to deal with the timing-critical SRAM-VGA interaction.

Report

The project report is available here (warning, 1.0 megabyte PDF). Other documents - such as a more complete version of the report with code - as well as the design proposal and the final presentation can be found on the course webpage.

Acknowledgments

Bhargav would like to thank Prof. Edwards for insisting on a milestone-driven project timeline, and for pushing us to explore beyond the boundaries that we had set for ourselves. Technical assistance was provided by David Lariviere, the course TA.