All students are required to sign the non-disclosure form, which can be downloaded from this page, in order to get access to design tools and technology information.
Time : Fridays 3pm to 5pm
Venue : VLSI Lab, 12th Floor Mudd
Solutions to Homework 1
Solutions to Homework - II
Solutions to Homework - III
The course project of EE6312 involves design of the first stage of a pipe-line ADC. It involves design and integration of an Opamp and the switch capacitor circuits to make an MDAC. The student is expected to derive the specifications for the Opamp based on the resolution and speed of the pipe-line chosen. A detailed description of the project can be found in this file.
Save the following model library file (spectre syntax) into your directory tree as TSMC018_teaching.scs and use it in Artist→Set-up→Models. This file only has a model for the regular 1.8V devices for a typical (section tt), slow (section ss), and fast (section ff) process corner.